The present invention relates generally to communication buffers and in particular the present invention relates to asynchronous transfer mode (ATM) buffer systems.
An asynchronous transfer mode (ATM) network comprises a layered architecture allowing multiple services like voice, data and video, to be mixed over a network. The network includes an interface to a physical communication medium and transmitted and received data can be communicated through buffer circuits. Typically, a buffer circuit is provided that can communicate with a predetermined number of communication ports provided through the physical medium. If an increased number of communication ports is desired, a larger buffer circuit is required.
Increasing the size of a buffer circuit to accommodate possible increases in ports can be undesirable. That is, manufacturing an application specific integrated circuit with data buffers large enough for a communication bus having 32 ports, for example, requires increased circuitry and a larger package size than a circuit having a 16 port bandwidth.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an ATM buffer system that allows for communication with more than one data bus.
The above-mentioned problems with communication buffers and other problems are addressed by the present invention and will be understood by reading and studying the following specification. Embodiments of the present invention provide an expandable buffer system. In one embodiment, the system includes buffer circuit that outputs a flow control signal to a second buffer circuit. Both buffer circuits receive data from a common data line, and the second buffer transmits data and status signals to the ATM matrix via a data line.
In one embodiment, an asynchronous transfer mode (ATM) buffer circuit comprises a first buffer coupled to communicate with a first X-ports of an ATM bus, and a second buffer coupled to communicate with a second X-ports of the ATM bus. The second buffer comprises flow control circuitry to provide a flow control signal to the first buffer.
In another embodiment, an asynchronous transfer mode (ATM) system comprises, an ATM matrix, and a first service card coupled to the ATM matrix through a first low voltage differential signal (LVDS) connection. The first service card comprises a first buffer to receive ATM cells from the ATM matrix through a second low voltage differential signal (LVDS) connection. A second service card is provided in the system that comprises a first buffer to receive ATM cells from the ATM matrix through the second low voltage differential signal (LVDS) connection, and a flow control connection to provide flow control data to the ATM matrix via the first low voltage differential signal (LVDS) connection and the first service card.